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up to 2a step down converter operating input voltage from 8v to 55v precise 3.3v ( 1%) internal refer- ence voltage output voltage adjustable from 3.3v to 50v switching frequency adjustable up to 300khz voltage feedforward zero load current operation internal current limiting (pulse-by- pulse and hiccup mode) inhibit for zero current consump- tion protection against feedback dis- connection thermal shutdown soft start function description the l4978 is a step down monolithic power switching regulator delivering 2a at a voltage be- tween 3.3v and 50v (selected by a simple exter- nal divider). realized in bcd mixed technology, the device uses an internal power d-mos transis- tor (with a typical rdson of 0.25 w ) to obtain very high efficency and high switching speed. a switching frequency up to 300khz is achiev- able (the maximum power dissipation of the pack- ages must be observed). a wide input voltage range between 8v to 55v and output voltages regulated from 3.3v to 50v cover the majority of todays applications. features of this new generations of dc-dc con- verter include pulse-by-pulse current limit, hiccup mode for short circuit protection, voltage feedfor- ward regulation, soft-start, protection against feedback loop disconnection, inhibit for zero cur- rent consumption and thermal shutdown. the device is available in plastic dual in line, minidip 8 for standard assembly, and so16w for smd assembly. october 2001 ? ordering numbers: l4978 (minidip) l4978d (so16) l4978 2a step down switching regulator minidip so16w d98in837a 5 2 8 4 1 l4978 c 1 220 m f 63v c 8 330 m f v o =3.3v/2a vi=8v to 55v r 1 20k c 2 2.7nf r 2 9.1k c 4 22nf 3 7 l1 126 m h (77120) 6 d1 gi sb560 c 5 100nf c 7 220nf c 6 100nf typical application circuit 1/12
pin functions dip so (*) name function 1 2 gnd ground 2 3 ss_inh a logic signal (active low) disables the device (sleep mode operation). a capacitor connected between this pin and ground determines the soft start time. when this pin is grounded disables the device (driven by open collector/drain). 3 4 osc an external resistor connected between the unregulated input voltage and this pin and a capacitor connected from this pin to ground fix the switching frequency. (line feed forward is automatically obtained) 4 5, 6 out stepdown regulator output 511 v cc unregulated dc input voltage 6 12 boot a capacitor connected between this pin and out allows to drive the internal dmos transistors 7 13 comp e/a output to be used for frequency compensation 8 14 fb stepdown feedback input. connecting directly to this pin results in an output voltage of 3.3v. an external resistive divider is required for higher output voltages. (*) pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die. pin connections gnd ss_inh osc out 1 3 2 4 vcc boot comp fb 8 7 6 5 d97in595 n.c. gnd ss_inh osc out n.c. out n.c. n.c. n.c. boot vcc comp fb n.c. n.c. 1 3 2 4 5 6 7 8 14 13 12 11 10 9 15 16 d97in596 inhibit softstart voltages monitor thermal shutdown e/a pwm 3.3v oscillator r s q internal reference internal supply 3.3v 5.1v drive cboot charge cboot charge at light loads 2 7 8 fb comp ss_inh 3 1 4 6 5 boot osc gnd out vcc d97in594 block diagram minidip so16w l4978 2/12
electrical characteristics (t j = 25c, c osc = 2.7nf, rosc = 20k w , v cc = 24v, unless other- wise specified.) * specification refered to t j from 0 to 125c symbol parameter test condition min. typ. max. unit dynamic characteristic v i operating input voltage range v o = 3.3 to 50v; i o = 2a 855v v o output voltage i o = 0.5a 3.33 3.36 3.39 v i o = 0.2 to 2a 3.292 3.36 3.427 v v cc = 8 to 55v 3.22 3.36 3.5 v v d dropout voltage v cc = 10v; i o = 2a 0.58 0.733 v 1.173 v i l maximum limiting current v cc = 8 to 55v 2.533.5a efficiency v o = 3.3v; i o = 2a 87 % f s switching frequency 90 100 110 khz svrr supply voltage ripple rejection v i = v cc +2v rms ; v o = v ref ; i o = 2.5a; f ripple = 100hz 60 db switching frequency stability vs. v cc vcc = 8 to 55v 3 6 % temp. stability of switching frequency t j = 0 to 125c 4 % soft start soft start charge current 30 40 50 m a soft start discharge current 6 10 14 m a inhibit v ll low level voltage 0.9 v i sll isource low level 515 m a thermal data symbol parameter minidip so16 unit r th(j-amb) thermal resistance junction to ambient max. 90 (*) 110 (*) c/w (*) package mounted on board. absolute maximum ratings symbol parameter value unit minidip s016 v 5 v 11 input voltage 58 v v 4 v 5 ,v 6 output dc voltage output peak voltage at t = 0.1 m s f=200khz -1 -5 v v i 4 i 5 ,i 6 maximum output current int. limit. v 6 -v 5 v12-v 11 14 v v 6 v 12 bootstrap voltage 70 v v 7 v 13 analogs input voltage (v cc = 24v) 12 v v 2 v3 analogs input voltage (v cc = 24v) 13 v v 8 v 14 (v cc = 20v) 6 -0.3 v v p tot power dissipation a t amb 60 c minidip 1w so16 0.8 w t j ,t stg junction and storage temperature -40 to 150 c l4978 3/12
symbol parameter test condition min. typ. max. unit dc characteristics i qop total operating quiescent current 46ma i q quiescent current duty cycle = 0; v fb = 3.8v 2.5 3.5 ma i qst-by total stand-by quiescent current v inh <0.9v 100 200 m a vcc = 55v; v inh <0.9v 150 300 m a error amplifier v fb voltage feedback input 3.33 3.36 3.39 v r l line regulation vcc = 8 to 55v 5 10 mv ref. voltage stability vs temperature 0.4 mv/c v oh high level output voltage v fb = 2.5v 10.3 v v ol low level output voltage v fb = 3.8v 0.65 v i o source source output current v comp = 6v; v fb = 2.5v 180 220 m a i o sink sink output current v comp = 6v; v fb = 3.8v 200 300 m a i b source bias current 2 3 m a svrr e/a supply voltage ripple rejection v comp = v fb ; vcc = 8 to 55v 60 80 db dc open loop gain r l = 50 57 db gm transconductance i comp = -0.1 to 0.1ma v comp = 6v 2.5 ms oscillator section ramp valley 0.78 0.85 0.92 v ramp peak vcc = 8v 2 2.15 2.3 v vcc = 55v 9 9.6 10.2 v maximum duty cycle 95 97 % maximum frequency duty cycle = 0% r osc = 13k w , c osc = 820pf 300 khz electrical characteristics (continued) l4978 4/12
d98in834a 5 2 8 4 1 l4978 c 1 220 m f 63v c 8 330 m f v o =3.3v/2a vi=8v to 55v r 1 20k c 2 2.7nf r 2 9.1k c 4 22nf 3 7 l1 126 m h (77120) 6 d1 gi sb560 c 5 100nf c 7 220nf c 6 100nf r 3 r 4 c1=220 m f/63v eke c2=2.7nf c5=100nf c6=100nf c7=220nf/63v c8=330 m f/35v cg sanyo l1=126 m h koolmu 77120 - 55 turns - 0.5mm r1=20k r2=9.1k d1=gi sb560 v o (v) r3(k w ) r4(k w ) 3.3 5.1 12 15 18 24 0 2.7 12 16 20 30 4.7 4.7 4.7 4.7 4.7 l4978 figure 1. test and evaluation board circuit. figure 2. pcb and component layout of the figure 1. l4978 5/12
0 5 10 15 20 25 30 35 40 45 50 vcc(v) 1 2 3 4 5 iq (ma) 200khz r 1 =22k c 2 =1.2nf 0hz d97in724 tamb=25?c 0% dc 100khz r 1 =20k c 2 =2.7nf figure 3. quiescent drain current vs. input voltage. 0 0.2 0.4 0.6 1.0 1.2 1.4 1.6 i o (a) 0.8 1.8 3.360 3.362 3.364 3.366 3.368 3.370 3.372 3.374 3.376 3.378 v o (v) tj=25?c tj=125?c v cc =35v d98in835 figure 7. load regulation 0 5 10 15 20 25 30 35 40 45 50 v cc (v) 60 70 80 90 100 110 120 130 140 150 ibias ( m a) d97in732 tj=25?c tj=125?c vss=gnd figure 5. stand by drain current vs. input voltage -50 -30 -10 10 30 50 70 90 110 tj(?c) 1 2 3 4 5 iq (ma) d97in731 0hz 200khz r 1 =22k c 2 =1.2nf v cc =35v 0% dc 100khz r 1 =20k c 2 =2.7nf figure 4. quiescent current vs. junction temperature 0 20 40 60 80 r1(k w ) 5 10 20 50 100 200 500 fsw (khz) d97in784 0.82nf 1.2nf 2.2nf 3.3nf 4.7nf 5.6nf tamb=25?c figure 8. switching frquency vs. r1 and c2 0 5 10 15 20 25 30 35 40 45 50 v cc (v) 3.370 3.371 3.372 3.373 3.374 3.375 3.376 3.377 v o (v) d97in733 tj=25?c tj=125?c figure 6. line regulation l4978 6/12
0 5 10 15 20 25 30 35 40 45 50 v cc (v) 90.0 92.5 95.0 97.5 100.0 102.5 105.0 107.5 fsw (khz) d97in735 tj=25?c figure 9. switching frequency vs. input voltage. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 60 65 70 75 80 85 90 95 io [ a ] h [%] vcc=8v vcc=12v vcc=24v vcc=48v vo=3.36v fsw=100khz figure 14. efficiency vs. output current. 0 5 10 15 20 25 30 80 82 84 86 88 90 92 94 96 98 vo [v] h [%] fsw=100khz fsw=200khz vcc=35v io=2a figure 12. efficiency vs output voltage. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i o (a) 1.6 1.8 0.0 0.1 0.2 0.3 0.4 0.5 d v (v) 0.6 0.7 tj=25?c tj=125?c d98in836 tj=-25?c figure 11. dropout voltage between pin 5 and 4. vcc=12v vcc=8v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 60 65 70 75 80 85 90 95 io [a] h [%] vcc=8v vcc=12v vcc=24v vcc=48v fsw=100khz vo=5.1v figure 13. efficiency vs. output current. -50 0 50 100 tj(?c) 90 95 100 105 fsw (khz) d97in785 figure 10. switching frequency vs. junction temperature. l4978 7/12
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i o (a) 60 65 70 75 80 85 90 h (%) d97in740 v cc =8v fsw=200khz v o =5.1v v cc =12v v cc =24v v cc =48v figure 15. efficiency vs. output current. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i o (a) 55 60 65 70 75 80 85 90 h (%) d97in741 v cc =8v fsw=200khz v o =3.36v v cc =12v v cc =24v v cc =48v figure 16. efficiency vs. output current. io=2a 0 102030405060 70 75 80 85 90 vcc [ v ] n [%] vo=5.1v fsw=100khz vo=5.1v fsw=200khz vo=3.36v fsw=100khz vo=3.36v fsw=200khz figure 17. efficiency vs. vcc. io=0.5a io=2a io=1a 0 102030405060 0 200 400 600 800 1000 vcc [ v ] pdiss [mw] io=1.5a vo=5.1v fsw=100khz figure 18. power dissipation vs. vcc. io=2a io=1a 0102030 0 200 400 600 800 1000 1200 1400 vo [ v ] pdiss [mw] io=0.5a io=1.5a vcc=35v fsw=100khz figure 19. device power dissipation vs. vo -50 -25 0 25 50 75 100 125 tj(?c) 2.3 2.4 2.5 2.6 2.7 2.8 2.9 ilim (a) d97in747 fsw=100khz v cc =35v figure 20. pulse by pulse limiting current vs. junction temperature. l4978 8/12
figure 21. load transient. 10 10 3 10 5 10 7 f(hz) 10 2 10 4 10 6 10 8 -200 -150 -100 -50 gain (db) 0 50 phase 0 45 90 135 d97in787 gain phase figure 25. open loop frequency and phase of er- ror amplifier 15 20 25 30 35 40 45 50 v ccmax (v) 0 100 200 300 400 l ( m h) d97in745 680nf fsw=100khz 470nf 330nf 220nf 100nf figure 23. soft start capacitor selection vs in- ductor and vccmax. 2 1 d97in786 v cc (v) 30 20 10 v o (mv) 100 0 -100 1ms/div i o = 1a f sw = 100khz figure 22. line transient. 15 20 25 30 35 40 45 50 v cc max(v) 0 100 200 300 l ( m h) 56nf fsw=200khz d97in746 47nf 33nf 22nf figure 24. soft start capacitor selection vs. in- ductor and vccmax. l4978 9/12
outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 3.32 0.131 a1 0.51 0.020 b 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 d 10.92 0.430 e 7.95 9.75 0.313 0.384 e2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 f 6.6 0.260 i 5.08 0.200 l 3.18 3.81 0.125 0.150 z 1.52 0.060 minidip l4978 10/12
dim. mm inch min. typ. max. min. typ. max. a 2.35 2.65 0.093 0.104 a1 0.1 0.3 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 10.1 10.5 0.398 0.413 e 7.4 7.6 0.291 0.299 e 1.27 0.050 h 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 l 0.4 1.27 0.016 0.050 k 0? (min.)8? (max.) h x 45 a e b d e a1 h l c k 16 1 8 9 so16 wide outline and mechanical data l4978 11/12
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com l4978 12/12

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